Mahmudi, Ali and Jasmani, Jasmani (2018) PERANCANGAN KODE KOREKSI KESALAHAN REED SOLOMON CODE RS(31,27) DENGAN MENGGUNAKAN BAHASA VHDL. Jurnal Teknologi Informasi, 9 (1). ISSN 2086-2989
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PERANCANGAN KODE KOREKSI KESALAHAN REED SOLOMON CODE RS(31,27) DENGAN MENGGUNAKAN BAHASA VHDL - TURNITIN.pdf Download (173kB) |
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PERANCANGAN KODE KOREKSI KESALAHAN REED SOLOMON CODE.pdf Download (583kB) |
Abstract
Error correction technology is widely applied in the era of data / information exchange today. This technology is widely used to reduce the error rate on the exchange of data / information to acceptable limits. Hamming Code, Reed Muller Code, Golay Code, BCH Code and Reed Solomon Code are some examples of error correction technology that is widely used. This paper presents the Reed Solomon Code. Here, the Reed Solomon Code is decoded using the Welch Berlekamp algorithm. The Reed Solomon RS code (31, 27) is designed and designed using the VHDL language, and then simulated using the Altera ModelSim application. The simulation results show that the RS code (31, 27) goes as expected and is able to correct up to 2 errors.
| Item Type: | Article |
|---|---|
| Subjects: | Engineering > Informatics Engineering |
| Divisions: | Fakultas Teknologi Industri > Teknik Informatika S1 |
| Depositing User: | Mr Sayekti Aditya Endra |
| Date Deposited: | 28 Aug 2023 03:32 |
| Last Modified: | 28 Aug 2023 03:32 |
| URI: | http://eprints.itn.ac.id/id/eprint/12589 |
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